Fabricated boards¶
Which System-5 boards were sent to a PCB fab, judged from the files.
Sources of evidence:
- Production zip: a gerber zip in fab/ whose readme.txt carries an order number.
BoardNotes says the order number was written into that readme before upload, so these zips are what was sent.
- CAM run: photoplotter/drill info files (.gpi/.dri) record when gerbers were generated.
- DESCRIPTION: the note Ken kept in each revision folder.
- Website: "Production Date" columns on https://ken.krother.com/1802/ (last updated Oct–Nov 2005).
"NoTouch" is Sierra Proto Express's no-touch order service. cpu/eagle/rev-a/DESCRIPTION names Sierra Proto Express for the CPU order.
How the gerbers are checked¶
tools/verify_fab_vs_brd.py <fusion-export .brd> <fab zip> compares a board with the gerbers that were sent.
- It finds the whole-board offset by itself: Eagle 4's CAM output does not share the board's origin, and each layer has its own few-mil offset.
- It also detects a mirrored solder side: the 2005 .sol files are mirrored in X.
Ordered: order number on file¶
| Board | Rev | CAM run | Order | Other evidence |
|---|---|---|---|---|
| CPU | A | 2005-01-03 | NoTouch 17545-iNTJ (fab/cpu2a.zip) |
DESCRIPTION: "Sent for production Jan 3 2005 to Sierra Proto Express". Website: produced Jan 11 2005. Needed pin lifting, double sockets and rewiring. |
| IO: 1861 video + keyboard | A | 2005-01-04 | NoTouch 17593-iNTJ (fab/Video1a.zip) |
DESCRIPTION: "Sent to production Jan 4/05". Website: Jan 12 2005, with a photo. The 1861 circuit was never tested. |
| Memory (mem3) | B | 2005-04-07 | FXA5474ED07 (fab/mem3b.zip). Verified 2026-10-05: the Fusion export of mem3-b.brd matches the gerbers in this zip: 606/606 holes, 918/918 top and 629/629 bottom tracks (fab/verify-fab-vs-brd.txt). |
The fab was PCB Fab Express: the board's underside silkscreen reads "PcbFabEx FXA5474" (photo 2026-10-05). It was built and works, with the chip-select rework described in memory/REVIEW.md. The Nov 2005 website still says "not yet produced", but its note "(FIX test with new PCB and picture)" suggests the board had arrived and was untested. |
Ordered 2026 (JLCPCB)¶
| Board | Rev | Ordered | Files sent | Note |
|---|---|---|---|---|
| Bus driver (BUSDRV-B) | B | 2026-10-20, JLCPCB 2000765A-Y56 | bus-driver/kicad/rev-b/busdrv-b-gerbers.zip |
Received and working (2026-10-30): first bring-up with the reworked Memory Rev B: bus master, all data and address lines, RAM read and write verified (memory/eagle/rev-b/bringup/README.md). 2 layers, 1.6 mm, HASL: Rev A's circuit re-routed as a true 2-layer board, C1/C2 0.1"; passed tools/preorder_check.py --layers 2 on 2026-10-19. JLCPCB shows it as Y56-2000765A; not yet received or built. |
| Bus driver (BUSDRV-A) | A | 2026-10-09, JLCPCB 2000765A-Y53 | bus-driver/kicad/rev-a/busdrv-a-gerbers.zip |
SCRAP: the zip held only 2 of the board's 4 copper layers; 234 of 247 track segments are missing from the made boards (found 2026-10-19). Replaced by Rev B (BUSDRV-B, bus-driver/kicad/rev-b/), a true 2-layer re-route, ordered 2026-10-20 (2000765A-Y56). 2 layers, 1.6 mm, HASL. JLCPCB shows it as Y53-2000765A; not yet received or built. Zip re-verified against the board that day (every layer and the drill file); DRC 0, schematic parity 0. |
| Memory (MEM3-E) | E | 2026-10-20, JLCPCB 2000765A-Y55 | memory/kicad/rev-e/memory-rev-e-gerbers.zip |
4 layers, 1.6 mm, HASL: Rev D's circuit (identical netlist) re-routed with signals on F.Cu/B.Cu and GND/VCC planes on In1/In2; passed tools/preorder_check.py --layers 4 on 2026-10-19. JLCPCB shows it as Y55-2000765A. Received (Ken, 2026-10-31); not yet built. Reviewed before building (memory/kicad/rev-e/REVIEW-2026-10-30.md, REVIEW-2026-10-31-independent.md): no blockers; build with 74HCT151 muxes, 27C256 EPROMs and IC14 a 74LS32. |
| Memory (MEM3-D) | D | 2026-10-09, JLCPCB 2000765A-Y54 | memory/kicad/rev-d/memory-rev-d-gerbers.zip |
SCRAP: the zip held only 2 of the board's 4 copper layers; 1,116 of 1,227 track segments are missing from the made boards (found 2026-10-19). Replaced by Rev E (MEM3-E, memory/kicad/rev-e/): the same circuit as a proper 4-layer board (GND/VCC planes), ordered 2026-10-20 (2000765A-Y55). 2 layers, 1.6 mm, HASL. JLCPCB shows it as Y54-2000765A; not yet received or built. Zip re-verified against the board that day (every layer and the drill file); DRC 0, schematic parity 0. Build with 74HCT151 muxes. |
Ordered in one JLCPCB order with YACC1-D's memory card v2.0 (2000765A-Y52). The 6845 Rev B order files are ready but on hold (BACKLOG.md).
Ordered: no order number, but strong evidence¶
| Board | Rev | CAM run | Evidence |
|---|---|---|---|
| Memory (mem3) | A | none in tree | Website: produced Dec 16 2004, "the first new card built for System-5", with a photo. DESCRIPTION: "Initial Design sent to production". |
| 6845 video | A | 2005-02-09 | DESCRIPTION: "Sent to Production Feb 9/05 Bare card only". Website: produced Feb 15 2005. Built and worked: the Mar 2005 website photo (docs/website-2005/images/P3070210.JPG) is this card, and Ken still has it (photos 2026-10-09, sockets empty). It carries the double-socketed EPROM (A11 fix), a hand-wired DB9 and what looks like a lower-case trial on IC10/IC13 (video-6845/eagle/rev-a/photos/README.md). Its chips later went to the Rev B card. A second, unpopulated Rev A board also survives (photos 2026-10-08). |
| IDE / CF | A | 2005-02-01 | DESCRIPTION: "Production Version". Website: produced Feb 11 2005, with a photo carrying a CF-to-IDE adapter and a 16 MB CF card. |
| Bus (backplane) | 2009 | 2009-02-04 (Eagle backup) | Built (Ken, 2026-10-26: "there was a PCB", without a regulator). The 2009 board: six 36-pin slots, every pin bussed, 8 mounting holes, X1 a 2-pin power connector: on the copper its pin 2 touches the GND track (Eagle never logged it) and its pin 1 reaches nothing; the +5V tracks dangle short of it (DRC of the conversion). Photos of bare boards: bus/eagle/rev-2009/photos/. Source: Eagle's backups bus.b## / bus.s## (bus/eagle/rev-2009/); KiCad bus/kicad/rev-2009 (MATCH 36/36). No order record or gerbers survive. Open: confirm with a meter (X1.2 = GND, X1.1 open) and how +5V reached the slots (a wire to X1.1?). |
| 6845 video | B | 2005-04-05 | Built: Ken's working card is Rev B (found 2026-10-08). The 2026-10-07 photos match Rev B's silkscreen gerber (v6845-b.plc), not Rev A's: IC10 and IC13 lying sideways with IC14 on its own by the RCA jack, no SV2-SV4, a 16-pin 74LS174 at IC7 (Rev A: 14-pin 74LS90). Photos moved to video-6845/eagle/rev-b/photos/ (2026-10-08). Fitted differently from the design: IC8 is an SN74LS163AN (the design says 74HC160N). The Nov 2005 website's "No PCB YET" was out of date. Verified 2026-10-08: the Fusion export of the newest v6845-b.brd matches the surviving April 2005 CAM files: 669/669 bottom tracks, all 556 pads and vias, and the drill tally by size (fab/verify-fab-vs-brd.txt; the top copper .cmp was not kept). Its chips came from the Rev A card (same date codes; photos 2026-10-09). As fitted (photos): IC9 74AS175, IC4 74LS85, and no bypass capacitors, C8, LED1 or R1 (video-6845/eagle/rev-b/photos/README.md). |
Gerbers generated, probably not ordered¶
| Board | Rev | CAM run | Evidence |
|---|---|---|---|
| Bus | B | 2005-10-22 | A PCB backplane: 6 slots of 36 pins (the 30-pin System-5 bus with -EF1-3 above and -INP, -OUT, -IOM below), a 7805-style regulator, power connector, LED, 6 mounting holes, 6.30 x 3.94 in. Known from its CAM files: the silkscreen (bus/eagle/rev-b/fab/bus.plc, drawn as bus-rev-b-silkscreen.png) and the drill report (218 x 0.040", 6 x 0.126", 11 x 0.032"); its .brd is lost. Not the board Ken built (Ken, 2026-10-26: the built bus PCB has no regulator; it is the 2009 board). |
Design only¶
| Board | Rev | Why |
|---|---|---|
| Bus (backplane) | D (S5BUS-D) | Designed 2026-10-26 in KiCad (bus/kicad/rev-d/): 8 slots of 36 pins, screw terminal, pull-ups; reviewed and fixed 2026-10-26 (hole keep-outs, 2.5 mm supply feeds, card-window brackets); independent reviews 2026-10-27: 5 A power switch, 4 A polyfuse, P-MOSFET reverse protection, 6.3 mm C1, 1.0 mm silkscreen; passes tools/preorder_check.py --layers 2. Not ordered. |
| CPU | D | Designed 2026-10-30 in KiCad (cpu/kicad/rev-d/, DESIGN.md): the 36-pin CPU card, 2 MHz or an external clock, 2732 boot EPROM at F000, LOADED flag; passes tools/preorder_check.py --layers 2. Not ordered. |
| IO panel | A | Designed 2026-10-30 in KiCad (io-panel/kicad/rev-a/, DESIGN.md): 8 toggles, 8 LEDs, two TIL311s, Q LED, INPUT on -EF1, ELF-style RUN/LOAD on the 36-pin bus; passes tools/preorder_check.py --layers 2. Not ordered. |
| 6845 video | C | Design notes only (video-6845/kicad/rev-c/DESIGN.md, 2026-10-30): Rev B's video with the PS/2 keyboard moved over from the IO card, a 2 MHz-grade CRTC, the 36-pin bus. |
| CPU | cpu1 prototype | DESCRIPTION: "First cut with 1861 - unrouted". |
| CPU | B | Website: "NO PCB YET … UNBUILT/UNTESTED". |
| CPU | C | Eagle backups only. |
| Memory | mem1 | DESCRIPTION: "unrouted". |
| Memory | mem2 | Routed 6116 board; nothing shows it was ordered. |
| Memory (mem3) | C | Design only (2005). |
| Memory (mem3) | C mill | 2014 XML re-save set up for PCB milling. It may have been milled at home; nothing in the tree confirms it. |
| IO | B | Todo list only. |
| IDE | B | DESCRIPTION only. |
| Breadboard proto | A | Website: "No PCB has been produced yet". |
| Front panel | — | Website: "No version of this card exists yet". |